AD8341 Просмотр технического описания (PDF) - Analog Devices
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AD8341 Datasheet PDF : 20 Pages
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AD8341
Components
C2, C4, C7,
C9, C14, C1,
C3, C8, C10,
R2, R4, R5, R6
R8, SW1
Function
Supply Decoupling.
Output Disable Interface. The output stage of the AD8341 is disabled by applying a high
voltage to the DSOP pin by moving SW1 to Position B. The output stage is enabled moving
SW1 to Position A. The output disable function can also be exercised by applying an exter-
nal high or low voltage to the DSOP SMA connector with SW1 in Position A.
Default Conditions
C2, C4, C7, C9, C14 = 0.1 µF
(Size 0603)
C1, C3, C8, C10 = 100 pF
(Size 0603)
R2, R4, R5, R6 = 0 Ω
(Size 0603)
R8 = 10 kΩ (Size 0603)
SW1 = SPDT (Position A,
Output Enabled)
VS
RFIN
VP
IBBP
IBBM
R9
(OPEN)
C19 R7
0.1µF (OPEN)
R19
0Ω
W4
W3
R21 C15
R20
0Ω 0.1µF
0Ω
VP
TEST POINT
GND
TEST POINT
C2
0.1µF
VS
R14 R11 R15
4kΩ 2kΩ 44kΩ
C12
(OPEN)
C7
R5
0.1µF 0Ω
C8
100pF
IFLP
VPRF
C6
L3
100pF 1.2nH
CMRF
RFIN
C5
100pF
L4
1.2nH
RFIP
CMRF
C4
R4
0.1µF 0Ω
C3
100pF
VPRF
QFLP
AD8341
DSOP
CMOP
CMOP
RFOM
RFOP
CMOP
CMOP
VPS2
R2
0Ω
C1
100pF
SW1 B
R8
A
10kΩ
T1
C18 ETC1-1-13
100pF M/A-COM
L2
120nH
C14
0.1µF
C17
L1
100pF
120nH
C11
(OPEN)
VP
C10 R6
C9
100pF 0Ω
0.1µF
DSOP
RFOP
R12 R10 R13
4kΩ 2kΩ 44kΩ
VS
C16
0.1µF
QBBP
W2
R17
0Ω
R1
(OPEN)
W1
R16
0Ω
R18
0Ω
R3
C20 (OPEN)
0.1µF
QBBM
Figure 41. Evaluation Board Schematic
Rev. 0 | Page 18 of 20
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