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ZR36050

JPEG IMAGE COMPRESSION PROCESSOR

Unspecified 

ADVANCE INFORMATION

ZR36050

INTERNAL MEMORY FORMAT

The ZR36050 Internal Memory serves as a communication inter-

face between the ZR36050 and the host. The host determines

the operating modes and options of the ZR36050, the encod-

ing/decoding parameter values, and the JPEG marker segments

by writing the appropriate data into the ZR36050 Internal

Memory. It is also used to exchange auxiliary data between the

ZR36050 and the host.

The Internal Memory is divided into two parts; Control Register

section, and JPEG Marker Segment section.

The Control Register section contains a virtual register for the

GO command; configuration registers; the Markers Enable reg-

ister; code volume registers (target and actual accumulated);

scale and allocation factor registers; a Total Activity register;

Status registers; and Interrupt Request enable registers.

The JPEG Marker Segment section contains the JPEG marker

segments to be transferred to the compressed data bit stream

during the encoding process. It is also used to save the JPEG

marker segments extracted by the ZR36050 from the com-

pressed data during the decoding process.

The Compressed Data Input/Output register, for Compressed

Data Transfer in Slave mode, is also mapped in the Internal

Memory space.

The Internal Memory is organized in bytes and the description of

each byte is given in this section. Multiple-byte quantities are

always stored together, with the most-significant byte at the

lowest address, and the least-significant byte at the highest

address. Reserved registers in the Internal Memory are for the

ZR36050 use only and must not be accessed by the host. The

values/markers that appear in brackets [ ] must be written with

the specified values and are represented in hexadecimal.

All internal memory registers can be accessed by the host

except the reserved registers.

The Internal Memory address and compulsory data values are

specified as hexadecimal numbers. But note that quantization

and Huffman table indices are in decimal representation.

CONTROL REGISTERS DESCRIPTION

GO Register

GO Command. The GO command is used to start a new pass in

the encoding/decoding modes, and continuation of the compres-

sion/expansion operation after an interrupt signal is issued,

except for a DATRDY interrupt.

The GO command is executed by asserting a WR, CS, and

ADDR=0 in conjunction with random data or float of the DATA

bus.

HARDWARE Register

The fields of this register set the parameters of the host and com-

pressed data interfaces: Slave, DMA or Master mode transfer of

compressed data, Compressed Data Transfer width (8 bits or 16

bits) in Slave and DMA modes, and the Compressed Data

Transfer cycle time in Master mode.

In Master mode, the compressed data is transferred on the

CODE bus. In 8 bit Slave and DMA modes, it is transferred on

the DATA bus. In 16 bit Slave and DMA modes, the DATA bus

is extended to 16 bits by the CODE bus. In the 16 bit

DMA/SLAVE mode, if BELE is set to “0”, the first byte and all

other even numbered bytes are output on the DATA bus, and the

second byte and all other odd numbered bytes are output on the

CODE bus. If BELE is set to “1”, the above byte order is

reversed. Refer to section “INTERFACES” and Tables 3 and 2.

BSWD MSTR

DMA

CFIS

CFIS

CFIS

0

Figure 27. HARDWARE Register

BELE

Table 2. CFIS Setting In Master Mode

CFIS

Compressed Data Interface Bus Speed

000

1 CLK_IN per cycle

001

2 CLK_IN per cycle

010

3 CLK_IN per cycle

011

4 CLK_IN per cycle

100

5 CLK_IN per cycle

101

6 CLK_IN per cycle

110

7 CLK_IN per cycle

111

8 CLK_IN per cycle

28

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