WM2331CDT/V Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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WM2331CDT/V

10-bit 30MSPS ADC with PGA and Clamp

Wolfson Microelectronics plc 

Production Data

WM2331

OEB

WR

DIO[9:0] Output

tOEW

tDZ

hi - Z

tWRP

tWOE

tDS

tDH

Input

tDEN

hi - Z

Output

Note: All timing measurements are based on 50% of edge transition

Figure 1 Write Timing

Analogue Input

at AIN

Sample 1

tCLK

tCH

Sample 2

tCL

Sample 3

CLK

Digital Output

Pipeline Delay

Note: All timing measurements are based on 50% of edge transition

Sample 4

Sample 5

tD

Sample 1

Sample 2

Figure 2 Output Timing

Test Conditions:

AVDD = DVDD = 3.0V, fCLK = 30MHz, 50% duty cycle, MODE = AVDD, REFTS = 2.5V, REFBS = 0.5V, PGA gain = 1.0,

TA = TMIN to TMAX, unless otherwise stated.

PARAMETER

Clock

Clock period

Clock high time

Clock low time

Timing

Pipeline delay

Clock to data valid

Output disable to hi-Z output

Output enable to data valid

Output disable to write enable

Write disable to output enable

Write pulse width

Input data setup time

Input data hold time

SYMBOL TEST CONDITIONS

tCLK

tCH

tCL

MIN

33

15

15

tD

tDZ

0

tDEN

0

tOEW

12

tWOE

12

tWRP

15

tDS

5

tDH

5

TYP

16.5

16.5

3

MAX

UNIT

ns

ns

ns

CLK cycles

25

ns

20

ns

20

ns

ns

ns

ns

ns

ns

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

7

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