WM2331CDT/V Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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WM2331CDT/V

10-bit 30MSPS ADC with PGA and Clamp

Wolfson Microelectronics plc 

WM2331

Production Data

Test Conditions:

AVDD = DVDD = 3.0V, fCLK = 30MHz, 50% duty cycle, MODE = AVDD, REFTS = 2.5V, REFBS = 0.5V, PGA gain = 1.0,

TA = TMIN to TMAX, unless otherwise stated.

PARAMETER

Power Supplies

SYMBOL

Analogue supply current

IAVDD

Digital supply current

IDVDD

Standby power consumption

(digital and analogue combined)

IVDD(STBY)

Digital Logic Levels (CMOS Levels)

Input LOW level

VIL

Input HIGH level

VIH

Output LOW

VOL

Output HIGH

VOH

Notes

TEST CONDITIONS

MIN

MODE = AGND,

REFSENSE = AVDD

MODE = AVDD/2,

REFSENSE = VREF

MODE = AVDD,

REFSENSE = AVDD

CL = 10pF

(Note 2)

(Note 2)

IOL = -50µA

IOH = 50µA

0.8 x VDD

VDD – 0.2

TYP

MAX

UNIT

31

45

mA

37

mA

36

mA

6

mA

3

5

mW

0.2 x VDD

V

V

0.2

V

V

1. VCMCS can be applied as a single voltage source to REFTS and REFBS with these two pins connected together.

Alternatively the common mode of the input can be set by applying different voltage sources to these two pins, in

which case the common mode voltage is effectively the average of these two voltages, VCMCS = (REFTS + REFBS)/2.

2. Digital input and output levels refer to the supply used for the input/output buffer on the relevant pin. CLK and MODE

refer to the AVDD supply, all other digital input/output refers to the DVDD supply.

3. In full external reference mode the REFTF and REFTS pins should be shorted together, and the REFBF and REFBS

pins should be shorted together. Please refer to device operation examples in the device description section of the

datasheet.

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

6

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