WM2331CDT/V Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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WM2331CDT/V

10-bit 30MSPS ADC with PGA and Clamp

Wolfson Microelectronics plc 

Production Data

WM2331

Test Conditions:

AVDD = DVDD = 3.0V, fCLK = 30MHz, 50% duty cycle, MODE = AVDD, REFTS = 2.5V, REFBS = 0.5V, PGA gain = 1.0,

TA = TMIN to TMAX, unless otherwise stated.

PARAMETER

SYMBOL TEST CONDITIONS

MIN

TYP

Analogue Reference Inputs / Outputs in Top/Bottom Mode (MODE=AVDD)

Bottom reference voltage

applied to REFBS

0

Top reference voltage applied to

REFTS

1

Differential reference input

(REFTS – REFBS)

VTB

1

Reference input common mode

(REFTS + REFBS) / 2

VCMTB

0.5

Switched input capacitance on

REFBS

0.6

Switched input capacitance on

REFTS

0.6

REFBF output voltage

(AVDD -

VTB)/2

REFTF output voltage

(AVDD +

VTB)/2

Analogue Reference Inputs / Outputs in Centre-Span Mode (MODE=AVDD/2)

Reference voltage derived or

applied to VREF

1

REFBF output voltage

(AVDD -

VREF)/2

REFTF output voltage

(AVDD +

VREF)/2

Non-AIN side of differential input

applied to REFTS and REFBS

VCMCS

(Note 2)

0.5

Analogue Reference Inputs / Outputs in Full External Reference Mode (MODE=AGND) (Note 3)

Differential reference voltage

applied (REFTF – REFBF)

1

Reference input common mode

AVDD = 3.0V

1.3

1.5

(REFTF + REFBF) / 2

AVDD = 5.0V

2.0

2.5

Reference input resistance

680

VREF Input / Output specifications

Internal 1V reference to VREF

REFSENSE = VREF

0.95

1.0

Internal 2V reference to VREF

REFSENSE = AGND

1.9

2.0

External reference applied to

VREF pin in centre-span mode

REFSENSE = AVDD,

MODE = AVDD / 2

1

Input impedance in centre-span

mode

REFSENSE = AVDD,

MODE = AVDD / 2

18

MAX

AVDD - 1

AVDD

2

AVDD - 0.5

2

AVDD - 0.5

2

1.7

3.0

1.05

2.1

2

UNIT

V

V

V

V

pF

pF

V

V

V

V

V

V

V

V

V

Ω

V

V

V

kΩ

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

5

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