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W83193R-01 Просмотр технического описания (PDF) - Winbond

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W83193R-01
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W83193R-01 Datasheet PDF : 19 Pages
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W83193R-01
Bytes sequence order for I2C controller :
PRELIMINARY
Clock Address
A(6:0) & R/W
Ack
8 bits dummy
Command code
Ack
8 bits dummy
Byte count
Ack
Byte0,1,2...
until Stop
7.3 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.
After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
7.3.1 Register 0: CPU Frequency Select Register (1 = enable, 0 = Stopped)
Bit @PowerUp
7
1
6
1
5
1
4
1
3
0
2
x
1
0
0
0
Pin
Description
-
FTS(for frequency table selection by software via I2C)
-
FS2 (for frequency table selection by software via I2C)
-
FS1 (for frequency table selection by software via I2C)
-
FS0 (for frequency table selection by software via I2C)
-
0 = Selection by hardware
1 = Selection by software I2C
n/a Reserved
-
Bit1 Bit0
1 1 Tri-state all outputs
1 0 ±0.6% Spread Spectrum
0 1 ±1.5% Spread Spectrum
0 0 Normal
FUNCTION TABLE
Function
Description
Tri-State
Normal
CPU
Hi-Z
see table
PCI
Hi-Z
see table
Outputs
SDRAM
Hi-Z
CPU
REF
Hi-Z
14.318
IOAPIC
Hi-Z
14.318
Publication Release Date: May 1998
-7-
Revision 0.20

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