V54C316162V Просмотр технического описания (PDF) - Mosel Vitelic, Corp

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V54C316162V

200/183/166/143 MHz 3.3 VOLT/ 4K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16

Mosel Vitelic, Corp 

MOSEL VITELIC

50 Pin Plastic TSOP-II

PIN CONFIGURATION

Top View

VCC 1

I/O1 2

I/O2 3

VSSQ 4

I/O3 5

I/O4 6

VCCQ 7

I/O5 8

I/O6 9

VSSQ 10

I/O7 11

I/O8 12

VCCQ 13

LDQM 14

WE 15

CAS 16

RAS 17

CS 18

BA 19

A10 20

A0 21

A1 22

A2 23

A3 24

VCC 25

50 VSS

49 I/O16

48 I/O15

47 VSSQ

46 I/O14

45 I/O13

44 VCCQ

43 I/O12

42 I/O11

41 VSSQ

40 I/O10

39 I/O9

38 VCCQ

37 NC

36 UDQM

35 CLK

34 CKE

33 NC

32 A9

31 A8

30 A7

29 A6

28 A5

27 A4

26 VSS

V54C316162V-01

Pin Names

CLK

CKE

CS

RAS

CAS

WE

A0–A10

BA

I/O1–I/O16

LDQM, UDQM

VCC

VSS

VCCQ

VSSQ

NC

V54C316162V

Clock Input

Clock Enable

Chip Select

Row Address Strobe

Column Address Strobe

Write Enable

Address Inputs

Bank Select

Data Input/Output

Data Mask

Power (+3.3V)

Ground

Power for I/O’s (+3.3V)

Ground for I/O’s

Not connected

V54C316162V Rev. 2.9 September 2001

2

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