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V54C316162V Просмотр технического описания (PDF) - Mosel Vitelic, Corp

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V54C316162V Datasheet PDF : 21 Pages
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MOSEL VITELIC
V54C316162V
AC Characteristics (1,2,3) (Continued)
TA = 0 to 70°C; VSS = 0 V; VCC = 3.3 V ± 0.3 V, tT = 1 ns
Limit Values
-5
-55
-6
-7
# Symbol Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
24 tSREX Self Refresh Exit Time
Read Cycle
2 CLK + tRC
2 CLK + tRC
6
25 tOH
27 tHZ
Data Out Hold Time
CAS Latency = 3
CAS Latency = 2
2.5
2.5
2.5
2.5
ns
5
5.3
5.5
5.5
ns
7
7
7
7
28 tDQZ
DQM Data Out Disable Latency
2
2
2
2
CLK
Write Cycle
29 tWR
Write Recovery Time
CAS Latency = 3
CAS Latency = 2
5
5.5
6
7
ns
10
10
10
10
ns
30 tDQW DQM Write Mask Latency
0
0
0
0
CLK
Notes for AC Parameters:
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests have VIL = 0.8V and VIH = 2.0V with the timing referenced to the 1.4 V crossover point. The transition
time is measured between VIH and VIL. All AC measurements assume tT = 1ns with the AC output load circuit shown
in Figure 1.
CLK
COMMAND
tCK
tCS tCH
1.4V
tAC
tLZ
VIH
VIL
tT
tAC
tOH
+ 1.4 V
50 Ohm
Z=50 Ohm
I/O
50 pF
OUTPUT
1.4V
tHZ
Figure 1.
3. If clock rising time is longer than 1 ns, a time (tT/2 0.5) ns has to be added to this parameter.
4. If tT is longer than 1 ns, a time (tT 1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as
follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)
6. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
V54C316162V Rev. 2.9 September 2001
11

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