IDT72103 Просмотр технического описания (PDF) - Integrated Device Technology
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IDT72103 Datasheet PDF : 30 Pages
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IDT72103, IDT72104
CMOS PARALLEL-SERIAL FIFO 2,048 x 9 AND 4,096 x 9
PARALLEL TIMINGS:
tRSC
t RS
tRSS
tRSS
,
,
,
t RSF1
t RSF2
Figure 2. Reset
INDUSTRIAL TEMPERATURE RANGE
tRSR
2753 drw 05
t WC
t RC
D0–8
t WPW
t DS
t WR
tDH
2753 drw 06
Figure 3. Write Operation in Parallel Data In Mode
Q0–8
t RPW
t RLZ
tA
t RR
VALID DATA
t DV
t RHZ
2753 drw 07
Figure 4. Read Operation in Parallel Data Out Mode
,
All Flags
t RTC
t RT
t RTS
t RTF
Figure 5. Retransmit
t RTR
FLAG VALID
2753 drw 08
9
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