CY7C008(2004) Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C008
(Rev.:2004)

64K/128K x 8/9 Dual-Port Static RAM

Cypress Semiconductor 

Switching Waveforms

Read Cycle No. 1 (Either Port Address Access)[22, 23, 24]

tRC

ADDRESS

DATA OUT

tAA

tOHA

PREVIOUS DATA VALID

Read Cycle No. 2 (Either Port CE/OE Access)[22, 25, 26]

CE

OE

DATA OUT

ICC

CURRENT

ISB

tACE

tDOE

tLZOE

tLZCE

tPU

Read Cycle No. 3 (Either Port)[22, 24, 25, 26]

tRC

ADDRESS

tAA

CY7C008/009

CY7C018/019

DATA VALID

tOHA

tHZCE

tHZOE

DATA VALID

tPD

tOHA

CE

DATA OUT

tLZCE

tABE

tACE

tLZCE

Notes:

22. R/W is HIGH for read cycles.

23. Device is continuously selected CE = VIL. This waveform cannot be used for semaphore reads.

24. OE = VIL.

25. Address valid prior to or coincident with CE transition LOW.

26. To access RAM, CE = VIL, SEM = VIH. To access semaphore, CE = VIH, SEM = VIL.

tHZCE

Document #: 38-06041 Rev. *C

Page 9 of 19

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