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CY7C008
(Rev.:2004)

64K/128K x 8/9 Dual-Port Static RAM

Cypress Semiconductor 

CY7C008/009

CY7C018/019

Electrical Characteristics Over the Operating Range

Parame-

ter

Description

-12[1]

Min. Typ. Max.

VOH

Output HIGH Voltage

2.4

(VCC=Min., IOH= –4.0 mA)

VOL

Output LOW Voltage

0.4

(VCC=Min., IOH= +4.0 mA)

VIH

Input HIGH Voltage

2.2

VIL

Input LOW Voltage

0.8

IOZ

Output Leakage Current

–10

10

ICC

Operating Current

Com’l

(VCC = Max., IOUT=0 mA)

.

Outputs Disabled

Ind.[9]

195 325

ISB1

Standby Current

Com’l

(Both Ports TTL Level)

.

CEL & CER ≥ VIH, f = fMAX Ind.[9]

55 75

ISB2

Standby Current

Com’l

(One Port TTL Level)

.

CEL | CER ≥ VIH, f = fMAX

Ind.[9]

125 205

ISB3

Standby Current

Com’l

(Both Ports CMOS Level)

.

CEL & CER ≥ VCC – 0.2V, f =

0

Ind.[9]

0.05 0.5

ISB4

Standby Current (One Port Com’l

CMOS Level)

.

CEL | CER ≥ VIH, f = fMAX[10] Ind.[9]

115 185

CY7C008/009

CY7C018/019

-15

Min. Typ. Max.

2.4

0.4

2.2

0.8

–10

10

190 280

50 70

120 180

0.05 0.5

110 160

Min.

2.4

2.2

–10

-20

Typ.

180

305

45

60

110

125

0.05

0.05

100

115

Max. Unit

V

0.4 V

V

0.8 V

10 µA

265 mA

290 mA

65 mA

80 mA

160 mA

175 mA

0.5 mA

0.5 mA

140 mA

155 mA

.

Capacitance[11]

Parameter

Description

Test Conditions

Max.

Unit

CIN

COUT

Input Capacitance

Output Capacitance

TA = 25°C, f = 1 MHz,

VCC = 5.0V

10

pF

10

pF

Note:

10. fMAX = 1/tRC = All inputs cycling at f = 1/tRC (except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS level standby ISB3

Document #: 38-06041 Rev. *C

Page 5 of 19

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