FS61850-01 Просмотр технического описания (PDF) - AMI Semiconductor
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FS61850-01 Datasheet PDF : 10 Pages
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AMERICAN MICROSYSTEMS, INC.
FS61850-01
1:10 HSTL SMBus Zero-Delay Clock Buffer IC
November 2000
4.0 Programming Interface
This device supports both Block Write and Block Read
commands. The device address is:
Table 3: Device Address
A6
A5
A4
A3
A2
1
1
0
1
0
A1
A0
0
1
4.1 Block Write
The Block Write command allows the Bus Host to write
several bytes of data to sequential registers, starting with
the Byte 0 Register. As shown in Figure 3, a Block Write
starts with the seven-bit device address followed by a
logic-low R/W bit.
According to SMBus protocol, a command code contain-
ing all zeroes (0000 0000) and a byte count describing
the number of data bytes to be written should be issued
by the Bus Host after the acknowledge handshake.
This device, however, ignores both the byte count and
the command code.
After a device acknowledge of the byte count, data bytes
are written sequentially, starting with the Byte 0 Register
and incrementing in order. An acknowledge between
each byte of data must occur before the next data byte is
sent.
Advance Information
After the last byte is written, any additional byte informa-
tion sent to the device wraps around and starts rewriting
information contained in Byte 0.
4.2 Block Read
The Block Read command, shown in Figure 4, permits
the Bus Host to read several bytes of data from sequen-
tial registers, starting by default at the Byte 0 Register. To
begin a Block Read, the seven-bit device address is sent
from the Host, followed by a logic-high R/W bit.
Note that a repeated START command is not required to
initiate a Block Read.
After an acknowledgement of the byte count this device
takes command of the bus and transmits all the data be-
ginning the Byte 0 Register. After the last byte of data,
the Bus Host should generate a “not-acknowledge,” fol-
lowed by a STOP command.
Without a STOP command, any additional read requests
after reading the last byte wrap around and begin re-
reading information contained in Byte 0. If the host does
not want to receive all the data contained in the device,
the host should not-acknowledge the last desired data
byte and issue a STOP command on the next clock.
Figure 3: Block Write
S DEVICE ADDRESS W A
A BYTE COUNT = N A
DATA BYTE 1
A
76543210 76543210
DATA BYTE N
AP
76543210
7-bit Receive
Device Address
START
Command
Command Code
Acknowledge
WRITE Command
Byte Count
Acknowledge
Write Data
Acknowledge
Write Data
Acknowledge
Acknowledge
STOP Command
From Bus Host
to device
From device to
Bus Host
Figure 4: Block Read
S DEVICE ADDRESS R A
BYTE COUNT = N
A
DATA BYTE 1
A
76543210
7-bit Receive
Device Address
START
Command
Byte Count
Acknowledge
READ Command
Read Data
Acknowledge
Acknowledge
DATA BYTE N
AP
76543210
Read Data
NO Acknowledge
STOP Command
From Bus Host
to device
From device
to Bus Host
ISO9001
QS9000
3
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