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CMX624 Просмотр технического описания (PDF) - CML Microsystems Plc

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CMX624
CML
CML Microsystems Plc CML
CMX624 Datasheet PDF : 26 Pages
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V23 / Bell 202 Modem
CMX624
In the transmit direction, the level on the 4-wire line is determined by the level at the TOP pin, the gain
of the Output Buffer Amplifier, a loss of nominally 6dB due to the line termination resistor R15, and the loss
in the transformer.
The TOP pin signal level is proportional to VDD and is also affected by the setting of the Tx o/p level
control bit (bit 2) of the FSK Mode Register.
Assuming that the Tx o/p level control bit is set to ‘1’ (giving a FSK signal level of -3dB wrt 775mVrms at
the TOP pin when VDD = 5.0V) and that there is 1dB loss in the transformer, then:
Tx FSK 4-wire line level = -(3 +6 +1) + 20 x LOG10(2 x R14 / R13) + 20 x LOG10(VDD / 5.0) dBm
For example, to generate a nominal Tx FSK line level of -9dBm, R13 should be 180kwhen VDD = 5.0V,
falling to 120kat 3.3V.
2-Wire Line Interface
Figure 8b shows an interface circuit suitable for connection to a 6002-wire line. The circuit also shows
how a relay may be driven from the RLYDRV pin. Note that when the CMX624 is powered from less than
5.0V, buffer circuitry will be required to drive a 5V relay.
Note ac and dc loads and line protection not shown for clarity.
R11 See text
R12 100k
R13 See text
R14 100k
R15 600
R16 120k
R17 100k
Resistors ±1%, capacitors ±20%
C11 220pF
C12 330pF
C13 10nF
C14 100nF
Figure 8b 2-Wire Line Interface Circuit
This circuit includes a 2-wire to 4-wire hybrid circuit, formed by R11, R15, R16, R17, C13 and the
impedance of the line itself, which ensures that the modem receive input and transmit output paths are
both coupled efficiently to the line, while minimising coupling from the modem’s transmit signal into the
receive input.
The values of R11 and R13 should be calculated in the same way as for the 4-wire interface circuit of
Figure 8a.
2003 CML Microsystems Plc
16
D/624/7

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