OVERVIEW
The WEDC 755/SSRAM multichip package is targeted for high performance, space sensitive, low power systems and supports the following power management features: doze, nap, sleep and dynamic power management.

The WED3C7558M-XBX multichip package consists of:
■ 755 RISC processor
■ Dedicated 1MB SSRAM L2 cache, confi gured as 128Kx72
■ 21mmx25mm, 255 Ceramic Ball Grid Array (CBGA)
■ Core Frequency/L2 Cache Frequency (300MHz/ 150MHz, 350MHz/175MHz)
■ Maximum 60x Bus frequency = 66MHz

FEATURES
■ Footprint compatible with WED3C750A8M-200BX
■ Footprint compatible with Motorola MPC 745