Introduction
The Advanced CMOS Frame Aligner PEB 2035 (ACFA) is a monolithic CMOS device which implements the interface to primary rate PCM carriers. It may be programmed to operate in 24- channel (T1) and 32-channel (CEPT) carrier systems.

FEATUREs
Serial Interface to Line Interface Unit
● Frame alignment/synthesis for 2048 kbit/s (CEPT,
   PCM 30) and 1544 kbit/s (T1, PCM 24)
● Meets newest CCITT Rec’s (Blue Book), FTZ Rec’s and
   AT&T technical advisories (DMI, August 1986)
● Programmable formats for
   PCM 30: Doubleframe, CRC Multiframe
   PCM 24: 4-Frame Multiframe (F4), 12-Frame Multiframe
   (F12, D3/4), Extended Superframe (ESF), Remote Switch
   Mode (F72)
● Selectable conditions for loss of sync
● Selectable line codes (HDB3, B8ZS, AMI with ZCS)
● Unipolar NRZ for interfacing fibre optical transmission
   routes
● Error checking via CRC4 or CRC6 procedures
● Insertion and extraction of alarms and facility signaling
● IDLE code insertion for selectable channels

Serial Interface to System Internal Highway
● System clock frequency of either 4096 kHz or 8192 kHz
● Selectable 2048/4096 kbit/s system internal highway with programmable receive/transmit shifts
● Two-frame deep elastic receive memory for receive route clock wander and jitter compensation
   (can be reduced to one-frame length for PCM 30 master-slave applications)
● One frame elastic transmit memory (PCM 24 mode only) for transmit route clock wander and
   jitter compensation
● Two different time-slot assignment procedures in PCM 24 mode
● Support for different signaling schemes
● Channel loop back capabilities
● Channel parity error monitoring
● Clear channel capabilities in PCM 24 mode

Microprocessor Interface
● Parallel, demultiplexed microprocessor interface for random access to control and status
   registers
● Alarm interrupt capabilities
● Access to different signaling information:
   – Sa-, E, Si -bits (register)
   – Sa-bits (5-byte stack)
   – FDL bits with the possibility of mixed insertion
   – CCS, CAS-CC (common channel), CAS-BR (bit robbing) via 2/3-byte stacks with DMA/
      interrupt support
● Extensive test and diagnostic capabilities

General
● Advanced CMOS technology
● Low power consumption (< 100 mW)
● Packaging: P-DIP-40, P-LCC-44