Circuit Description
I2C Bus Interface
The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits. It consists of a data line SDA and a clock line SCL. The data line requires an external pull-up resistor to VCC (open drain output stages).

FEATUREs
● Word-organized reprogrammable nonvolatile memory
   in n-channel floating-gate technology (E2PROM)
● 512 × 8-bit organization
● Supply voltage 5 V
● Serial 2-line bus for data input and output (I2C Bus)
● Reprogramming mode, 10 ms erase/write cycle
● Reprogramming by means of on-chip control (without
   external control)
● The end of the programming cycle can be checked
● Data retention in excess of 10 years
● More than 104 reprogramming cycles per address