The ExpressLane™ PEX 8748 device offers Multi-Host PCI Express switching capability enabling users to connect multiple hosts to their respective endpoints via scalable, high bandwidth, non-blocking interconnection to a wide variety of applications including servers, storage, communications, and graphics platforms. The PEX 8748 is well suited for fan-out, aggregation, and peer-to-peer traffic patterns.
Highlights
■ PEX 8748 General Features
o 48-lane, 12-port PCIe Gen 3 switch
- Integrate 8.0 GT/s SerDes d
o 27 x 27mm2, 676-pin FCBGA package
o Typical Power: 8.0 Watts
■ PEX 8748 Key Features
o St ndards Compliant a
- PCI Express Base Specification, r3.0 (compatible w/ PCIe r1.0a/1.1 & 2.0)
- PCI Power Management Spec, r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes speed control
o Hi Performance gh
♦ performancePAK
• Read Pacing (bandwidth throttling)
• Multicast
• Dynamic Buffer/FC Credit Pool
- Non-blocking switch fabric
- Full line rate on all ports
- Packet Cut-Thru with 100ns max packet latency (x16 to x16)
- 2KB Max Payload Size
o Flexible Configuration
- Ports configurable as x1, x2, x4, x8, x16
- Registers configurable with strapping pins, EEPROM, I2C, or host software
- Lane and polarity reversal
- Compatible with PCIe 1.0a PM
o Multi-Host & Fail-Over Support
- Configurable Non-Transparent (NT) port
- Failover with NT port
- Up to 6 upstream/Host ports with 1+1 or N+1 failover to other upstream ports
o Quality of Service (QoS)
- Eight traffic classes per port
- Weighted round-robin source port arbitration
o Reliability, Availability, Serviceability
♦ visionPAK
• Per Port Performance Monitoring
▪ Per port payload & header counters
• SerDes Eye Capture
• PCIe Packet Generator
• Error Injection and Loopback
- 3 Hot Plug Ports with native HP Signals
- All ports hot plug capable thru I2C (Hot Plug Controller on every port)
- ECRC and Poison bit support
- Data Path parity
- Memory (RAM) Error Correction
- INTA# and FATAL_ERR# signals
- Advanced Error Reporting
- Port Status bits and GPIO available
• Per port error diagnostics
- JTAG AC/DC boundary scan