[PLX Technology, Inc.]
FEATUREs
■ General Features
o Forward and Reverse bridging
o Tiny 161 ball BGA package (10mm x 10mm)
o Low power – 0.3 Watts maximum
o EEPROM configuration option with SPI
o Internal 8Kbyte shared RAM
o 1.5 V core supply voltage
o JTAG
o Four (4) GPIO pins for maximum design and application flexibility
o Extensive PME support including D0 and D0Active, D1, D2 and D3Hot and D3Cold
■ Integrated PCI Express Interface
o PCI Express Base specification 1.0a compliant
o x1 Link, full-duplex, 2.5 Gbps
o One virtual channel
o Automatic LVDS polarity reversal
o 128 byte maximum payload size
o Link CRC
o Link power management
o Flow control buffering
o PCI Express transaction queues for eight (8) outstanding TLPs
■ PCI Interface
o PCI 3.0: 32 bits at 33 MHz
o PCI Power Management 1.1
o Internal arbiter supports up to 4 external masters; provides REQ#/GNT# signals
o 3.3V I/O and 5V tolerant PCI
o Message Signal Interrupt (MSI) support
o Provides PCI clock output
o Four mailbox registers for messaging
o ISA Enable and VGA Enable registers for legacy operation