ARCHITECTURE OVERVIEW
The MT9D115 combines a 2 Mp sensor core with an IFP to form a stand-alone solution for both image acquisition and processing. Both the sensor core and the IFP have internal registers that can be controlled by the user. In normal operation, an integrated microcontroller autonomously controls most aspects of operation. The processed image data is transmitted to the host system either through the parallel or MIPI interface.
Figure 1 shows the major functional blocks of the MT9D115.

FEATUREs
• 2 Mp Resolution (1600 (H) × 1200 (V))
• 1/5-inch Optical Format
• Same or Better Image Quality Compared to MT9D112
• Individual Module ID Support Through One-time Programmable
   (OTP) Memory
• Surface Fit Lens Correction (LC) to Compensate for Lens/Small
   Pixel Vignetting and Corner Color Variations
• Automatic Functions: Exposure, White
   Balance, Black Level Offset Correction,
   Flicker Detection and Avoidance, Color
   Saturation Control, Defect Identification and
   Correction, Aperture Correction, and GPIO
• Programmable Controls: Exposure, White
   Balance, Horizontal and Vertical Blanking,
   Color, Sharpness, Gamma, Lens Shading
   Correction, Horizontal and Vertical Image
   Flip, Zoom, Windowing, Sampling Rates,
   and GPIO
• 15 Frames per Second (fps) at
   1600(H) × 1200 (V) with Moderate Pixel
   Clock Frequency (≤ 64 MHz) to Minimize
   Baseband Reception Interference and 30 fps
   at 800 (H) × 600 (V)
• 2 × 2 Pixel Binning to Improve Low-light
   Image Quality
• Support for External LED or Xenon Flash
• On-chip Phase-locked Loop (PLL) to
   Minimize the Number of System Clocks
• Low Power Modes to Prolong Battery Life
   of Portable Devices
• Fail-safe I/Os with Programmable Output
   Slew Rate
• Industry Standard Two-wire Serial Interface
   for Controls
• 10-bit Parallel or MIPI Serial Interfaces for
   Image Data

APPLICATIONs
• Cellular Phones
• PC Cameras
• PDAs