PARALLEL D REGISTER WITH ENABLE

The MC54/74F378 is a 6-bit register with a buffered common enable. This device is similar to the F174 but with common Enable rather than common Master Reset.
The F378 consists of six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The Clock (CP) and Enable (E) inputs are common to all flip-flops.
When the E input is LOW, new data is entered into the register on the LOWto-HIGH transition of the CP input. When the E input is HIGH the register will retain the present data independent of the CP input. This circuit is designed to prevent false clocking by transitions on the E input..

• 6-Bit High-Speed Parallel Register
• Positive Edge-Triggered D-Type Inputs
• Fully Buffered Common Clock and Enable Inputs
• Input Clamp Diodes Limit High-Speed Termination Effects