The MC100LVELT23 is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which require the translation of a clock and a data signal.

• 2.0 ns Typical Propagation Delay
• Maximum Frequency > 180 MHz
• Differential LVPECL Inputs
• PECL Mode Operating Range:VCC = 3.0 V to 3.8 V with GND = 0 V
• 24 mA LVTTL Outputs
• Flow Through Pinouts
• Internal Pulldown and Pullup Resistors
• Pb−Free Package is Available