Differential LVPECL to LVTTL Translator

The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.
The VBB output allows the EPT21 to also be used in a single–ended input mode. In this mode the VBB output is tied to the D0 input for a non–inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01µF capacitator.

• 1.4ns Typical Propagation Delay
• 275MHz Fmax (Clock bit stream, not pseudo–random)
• Differential LVPECL inputs
• Small Outline SOIC Package
• 24mA TTL outputs
• Flow Through Pinouts
• Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
• Q Output will default LOW with inputs open or at GND
• ESD Protection: >1500V HBM, >100V MM
• VBB Output
• New Differential Input Common Mode Range
• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
   For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
   Oxygen Index 28 to 34
• Transistor Count = 81 devices