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MC100EP131(2004) Даташит - ON Semiconductor

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MC100EP131

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3.3V / 5V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock

The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables. With AC performance faster than the E131 device, the EP131 is ideal for applications requiring the fastest AC performance available.

• 460 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• Differential Individual and Common Clocks
• Individual Asynchronous Resets
• Asynchronous Set
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output Will Default LOW with Inputs Open or at VEE

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