The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but is specified for operation at the standard 100E ECL voltage supply. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling input signals (for more information on AC coupling ECL signals refer to the interfacing section of the ECLinPS data book DL140/D).
The device features both individual and common select inputs to address both data path and random logic applications.
The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 forcing the Q output LOW.

• Differential Inputs and Outputs
• 20–Lead SOIC Packaging
• 440ps Typical Propagation Delays
• Separate and Common Select
• Supports Both Standard and Low Voltage 100K ECL
• Internal Input Pulldowns
• >2000V ESD Protection