■ GENERAL DESCRIPTION
The MBM29DL16XTD/BD are a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29DL16XTD/BD are offered in a 48-pin TSOP(I) and 48-ball FBGA Package.
These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.

■ FEATURES
• 0.33 µm Process Technology
• Simultaneous Read/Write operations (dual bank)
    Multiple devices available with different bank sizes (Refer to Table 1)
    Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
    Zero latency between read and write operations
    Read-while-erase
    Read-while-program
• Single 3.0 V read, program, and erase
    Minimizes system level power requirements
• Compatible with JEDEC-standard commands
    Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
    48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
    48-ball FBGA (Package suffix: PBT)
• Minimum 100,000 program/erase cycles
• High performance
    70 ns maximum access time
• Sector erase architecture
    Eight 4K word and thirty one 32K word sectors in word mode
    Eight 8K byte and thirty one 64K byte sectors in byte mode
    Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
    T = Top sector
    B = Bottom sector
• Hidden ROM (Hi-ROM) region
    64K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence
    Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC input pin
    At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status
    At VIH, allows removal of boot sector protection
    At VACC, increases program performance
• Embedded EraseTM Algorithms
    Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
    Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
    Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
    When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
    Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Sector group protection
    Hardware method disables any combination of sector groups from program or erase operations
• Sector Group Protection Set function by Extended sector group protection command
• Fast Programming Function by Extended Command
• Temporary sector group unprotection
    Temporary sector group unprotection via the RESET pin.
• In accordance with CFI (Common Flash Memory Interface)