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MAXQ1050(2011) Даташит - Maxim Integrated

MAXQ1050 image

Номер в каталоге
MAXQ1050

Компоненты Описание

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page
3 Pages

File Size
332.6 kB

производитель
MaximIC
Maxim Integrated MaximIC

General Description
The MAXQ1050 is a low-power secure microcontroller designed for USB secure token and smart card reader applications that require certificate-based or other public key cryptographic schemes. The device also incorporates a sophisticated security mechanism to protect secret key data; two self-destruct inputs and environmental monitors (temperature and voltage sensors) erase secret key data when an attack condition is detected. The device has an integrated full-speed USB device interface (including transceiver), hardware SPI™ controller, and an ISO 7816 UART (universal asynchronous receiver-transmitter) for smart card communication.


FEATUREs
♦ High-Performance, Low-Power, 32-Bit MAXQ30  RISC Core
♦ Operates from USB Power or Single 3.3V Supply
♦ Runs from 20MHz (typ) Internal Oscillator
♦ Supports External 12/24MHz Crystal Oscillator for  Microcontroller and USB Operation
♦ On-Chip 2x/4x Clock Multiplier
♦ 16-Bit Instruction Word, 32-Bit Internal Data Bus
♦ 16 x 32-Bit Accumulators
♦ 16 x 32-Bit General-Purpose Working Registers
♦ Up to 20 General-Purpose I/O Pins
♦ 5V Tolerant I/O
♦ Virtually Unlimited Software Stack
♦ Optimized for C-Compiler (High-Speed/Density Code)
♦ Memory
    ◇ 128KB Flash Memory, 512 x 32 Page Size
    ◇ Flash Memory Supports 20k Erase/Write Cycles per Sector
    ◇ 256B of Secure NV SRAM
    ◇ 4KB Battery-Backed NV SRAM
    ◇ 12KB SRAM
    ◇ Secure JTAG/TAP for In-System Programming
♦ Security
    ◇ Unique 64-Bit Serial Number
    ◇ Tamper Detection with Rapid Key/Data Destruction
    ◇ Secret Key Destruction on Tamper Events
    ◇ Permanent Loader Lockout Option
    ◇ Proprietary Code Scrambling Technique Using Random Keys
    ◇ Hardware Accelerators for AES, RSA, DSA, ECDSA, DES, 3DES, SHA-1, SHA-224, SHA-256
    ◇ True Hardware Random-Number Generator
    ◇ Temperature and Voltage Sensors to Detect Attacks
    ◇ Two Self-Destruct Input Pins
♦ Additional Peripherals
    ◇ Power-Fail Warning
    ◇ Power-On-Reset/Brownout Reset
    ◇ JTAG I/F for System Programming and Accessing On-Chip Debugger
    ◇ Full-Speed USB Device with Six Endpoint Buffers and Integrated Transceiver
    ◇ ISO 7816 Smart Card UART with FIFO
    ◇ 16-Bit Programmable Timers/Counters with Prescaler, Capture/Compare, and PWM
    ◇ SPI Master/Slave Hardware
    ◇ Programmable Watchdog Timer
    ◇ Up to 20 General-Purpose I/O Pins with Eight External Interrupts


APPLICATIONs
    Security and Banking Tokens
    Certificate Management
    Electronic Signature Generation
    Smart Grid Security
    Prepaid Utility
    e-Commerce
    Secure Access Control
    Pay-per-Play

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