DESCRIPTION
This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family.

FEATURES
• Part Identification
    - K4E170411D-B(F) (5V, 4K Ref.)
    - K4E160411D-B(F) (5V, 2K Ref.)
    - K4E170412D-B(F) (3.3V, 4K Ref.)
    - K4E160412D-B(F) (3.3V, 2K Ref.)
• Active Power Dissipation
• Refresh Cycles
• Performance Range
• Extended Data Out Mode operation (Fast Page Mode with Extended Data Out)
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)