DESCRIPTION
The ISSI IS61LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12 ns maximum.
WhenCEis HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 50 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS61LV256 is available in the JEDEC standard 28-pin, 300-mil DIP and SOJ, plus the 450-mil TSOP package.

FEATURES
• High-speed access time: 12, 15, 20, 25 ns
• Automatic power-down when chip is deselected
• CMOS low power operation
   — 345 mW (max.) operating
   — 7 mW (max.) CMOS standby
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh required
• Three-state outputs