• High-speed H8S/2600 central processing unit with an internal 16-bit architecture
Upward-compatible with H8/300 and H8/300H CPUs on an object level
Sixteen 16-bit general registers
69 basic instructions
Multiplication and accumulation instructions
• Various peripheral functions
Data transfer controller (DTC)
14-bit PWM timer (PWMX)
16-bit free-running timer (FRT)
8-bit timer (TMR)
Watchdog timer (WDT)
Asynchronous or synchronous serial communication interface (SCI)
CRC operation circuit (CRC)
Serial communication interface with FIFO (SCIF)
I2C bus interface (IIC)
LPC interface (LPC)
10-bit A/D converter
Boundary scan (JTAG)
Clock pulse generator