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F59D2G81LA Даташит - [Elite Semiconductor Memory Technology Inc.

F59D2G81LA image

Номер в каталоге
F59D2G81LA

Компоненты Описание

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page
56 Pages

File Size
2 MB

производитель
ESMT
[Elite Semiconductor Memory Technology Inc. ESMT

GENERAL DESCRIPTION
The device is a 256Mx8bit with spare 8Mx8bit capacity (or 128Mx16bit with spare 4Mx16bit capacity). The device is offered in 1.8V VCC Power Supply. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased.


FEATURES
• Voltage Supply: 1.8V (1.7V ~ 1.95V)
• Organization
   x8:
   - Memory Cell Array: (256M + 8M) x 8bit
   - Data Register: (2K + 64) x 8bit
   x16:
   - Memory Cell Array: (128M + 4M) x 16bit
   - Data Register: (1K + 32) x 16bit
• Automatic Program and Erase
   x8:
   - Page Program: (2K + 64) byte
   - Block Erase: (128K + 4K) byte
   x16:
   - Page Program: (1K + 32) word
   - Block Erase: (64K + 2K) word
• Page Read Operation
   - Page Size: (2K + 64) Byte (x8)
      Page Size: (1K + 32) Word (x16)
   - Random Read: 25us (Max.)
   - Serial Access: 45ns (Min.)
• Memory Cell: 1bit/Memory Cell
• Fast Write Cycle Time
   - Program time: 450us (Typ.)
   - Block Erase time: 3.5ms (Typ.)
• Command/Address/Data Multiplexed I/O Port
• Hardware Data Protection
   - Program/Erase Lockout During Power Transitions
• Reliable CMOS Floating Gate Technology
   - ECC Requirement: x8 – 1bit/512Byte
                                    x16 - 1bit/256 Word
   - Endurance: 100K Program/Erase cycles
   - Data Retention: 10 years
• Command Register Operation
• Automatic Page 0 Read at Power-Up Option
   - Boot from NAND support
   - Automatic Memory Download
• NOP: 4 cycles
• Cache Program/Read Operation
• Copy-Back Operation
• Two-Plane Operation
• EDO mode
• Bad-Block-Protect


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