Features
□ maximum processing speed
    In CDS mode, clamp mode
        1CH, 2CH mode: 40M sample / sec per channel
        4CH mode: 20M sample / sec per channel
    In DC direct connection mode
        1CH, 2CH mode: 10M sample / sec per channel
        4CH mode: 8.3M sample / sec per channel
□ Maximum input signal level: 1.35 Vpp (typ.) @ DC direct connection mode, CDS mode 1.29 Vpp (typ.) @ Clamp mode
□ Compatible with both CCD and CIS signal polarity
□ 4CH simultaneous sampling CDS circuit (Correlated Double Sampling)
□ Offset DAC: Range ± 200mV (typ.), 8bit, 4 channels independent
□ PGA: Gain adjustment range 0dB to 18dB (typ.), 8bit, 4 channels independent
□ Linearity: DNL = -1LSB (min.), + 1.5LSB (max.) Code missing guarantee
□ 5bit output bus: Output 10bit data in 5bit × 2 cycles
□ 4 wire serial interface
□ Power supply: 3.3V ± 0.3V
□ Power consumption: 360mW (typ.) @ 4ch mode, 20M sample / sec per channel
□ Package: 64pin LQFP, Pin pitch 0.5mm, Mold 10mm × 10mm