GENERAL DESCRIPTION
The AK4537 targeted at PDA and other low-power, small size applications. It features a 16-bit stereo CODEC with a built-in Microphone-Amplifier, Headphone-Amplifier and Speaker-Amplifier. Input circuits include a Microphone-Amplifier and an ALC (Auto Level Control) circuit. The AK4537 is available in a 52-QFN, utilizing less board space than competitive offerings.

FEATURES
1. Resolution : 16bits
2. Recording Function
    • Stereo Mic Input
    • Stereo Line Input
    • 1st MIC Amplifier : +20dB or 0dB
    • 2nd Amplifier with ALC
        +27.5dB ∼ -8dB, 0.5dB Step (MIC input)
        +12dB ∼ -23.5dB, 0.5dB Step (LINE input)
    • ADC Performance : S/(N+D) : 79dB, DR, S/N : 83dB (MIC input)
        S/(N+D) : 88dB, DR, S/N : 91dB (LINE input)
3. Playback Function
    • Digital De-emphasis Filter (tc=50/15µs, fs=32kHz, 44.1kHz, 48kHz)
    • Digital Volume (0dB ∼ -127dB, 0.5dB Step, Mute)
    • Stereo Headphone-Amp
        - S/(N+D) : 70dB, S/N : 90dB
        - Output Power : 15mW@16Ω (HVDD=3.3V)
        - Click Noise Free at Power ON/OFF
    • Mono Speaker-Amp with ALC
        - S/(N+D) : 64dB@150mW, S/N : 90dB
        - BTL Output
        - Output Power : 400mW@8Ω (BEEP Input, HVDD=3.3V) 300mW@8Ω (MIN Input, ALC2=OFF, HVDD=3.3V)
    • Mono and Stereo Beep Inputs
    • Mono Line Output
        - Differential Output
        - Performance : S/(N+D) : 89dB, S/N : 95dB
    • Stereo Line Output
        - Performance : S/(N+D) : 88dB, S/N : 92dB
4. Power Management
5. Master Clock
    (1) PLL Mode
        • Frequencies : 11.2896MHz, 12MHz and 12.288MHz
        • Input Level : CMOS
    (2) External Clock Mode
        • Frequencies : 2.048MHz ∼ 12.288MHz
6. Output Master Clock Frequencies : 32fs/64fs/128fs/256fs
7. Sampling Rate :
    (1) PLL mode
        • 8kHz, 11.025kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
    (2) External Clock mode
        • 8kHz ∼ 48kHz
8. Control mode: 4-wire Serial / I2C Bus
9. Master/Slave mode