Description
The 9FGV0841 is a member of IDTs SOC-friendly 1.8V very low-power PCIe clock family. It has integrated output terminations providing Zo = 100Ω for direction connection to 100Ω transmission lines. The device has 8 output enables for clock management, 2 different spread spectrum levels in addition to spread off, and 2 selectable SMBus addresses.

FEATUREs
• Direct connection to 100Ω transmission lines; saves 32 resistors compared to standard PCIe devices
• 62mW typical power consumption; reduced thermal concerns
• Outputs can optionally be supplied from any voltage between 1.05 and 1.8V; maximum power savings
• OE# pins; support DIF power management
• LP-HCSL differential clock outputs; reduced power and board space
• Programmable slew rate for each output; allows tuning for various line lengths
• Programmable output amplitude; allows tuning for various application environments
• DIF outputs blocked until PLL is locked; clean system start-up
• Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
• External 25MHz crystal; supports tight ppm with 0 ppm synthesis error
• Configuration can be accomplished with strapping pins; SMBus interface not required for device control
• 3.3V tolerant SMBus interface works with legacy controllers
• Selectable SMBus addresses; multiple devices can easily share an SMBus segment
• Space saving 6 x 6 mm 48-VFQFPN; minimal board space

Output Features
• 8 100MHz Low-Power (LP) HCSL DIF pairs with Zo = 100Ω
• 1 1.8V LVCMOS REF output with Wake-On-LAN (WOL) support

Typical Applications
PCIe Gen1–4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points