General description
The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC564 is specified in compliance with JEDEC standard no. 7A.

FEATUREs
■ 3-state inverting outputs for bus oriented applications
■ 8-bit positive-edge triggered register
■ Common 3-state output enable input
■ Independent register and 3-state buffer operation
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
    ◆ HBM EIA/JESD22-A114-B exceeds 2000 V
    ◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.