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74F109 Даташит - Fairchild Semiconductor

74F109 image

Номер в каталоге
74F109

Компоненты Описание

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7 Pages

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76.2 kB

производитель
Fairchild
Fairchild Semiconductor Fairchild

General Description
The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J and K inputs.

Asynchronous Inputs:
   LOW input to SD sets Q to HIGH level
   LOW input to CD sets Q to LOW level
   Clear and Set are independent of clock
   Simultaneous LOW on CD and SD makes
      both Q and Q HIGH

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Номер в каталоге
Компоненты Описание
PDF
производитель
Dual JK Positive Edge-Triggered Flip-Flop
Fairchild Semiconductor
Dual JK Positive Edge−Triggered Flip−Flop
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Dual JK Positive Edge-Triggered Flip-Flop
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DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
Motorola => Freescale
Dual JK Positive Edge−Triggered Flip−Flop ( Rev : 2001 )
ON Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
ON Semiconductor
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
Motorola => Freescale
Dual JK positive edge-triggered flip-flop
Motorola => Freescale
Dual JK Positive Edge−Triggered Flip−Flop
ON Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop
AVG Semiconductors=>HITEK

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