548G-05 Просмотр технического описания (PDF) - Integrated Circuit Systems
Номер в каталоге
Компоненты Описание
Список матч
548G-05 Datasheet PDF : 4 Pages
| |||
PRELIMINARY INFORMATION
ICS548-05A
MP3 Audio Clock
Pin Assignment
Output Clock Select Table
ICS548-05A
X1/ICLK
VDD
VDD
REFEN
GND
GND
S3
S2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
16 pin TSSOP
Pin Descriptions
X2
DC
REFOUT
S0
S1
PDCLK
DC
CLK
S3
Pin 7
0
0
1
1
1
1
1
1
1
1
S2
Pin 8
0
0
0
0
0
0
1
1
1
1
S1 S0 Input (MHz) CLK (MHz)
Pin 12 Pin 13 Pins 1, (16)
Pin 9
1
0
3.6864
2.8224
1
1
3.6864
3.072
0
0
3.6864
4.096
0
1
3.6864
5.6448
1
0
3.6864
6.144
1
1 Turns off PLL and stops CLK low
0
0
3.6864
8.192
0
1
3.6864
11.2896
1
0
3.6864
12.288
1
1
3.6864
2.048
Power Down Clock Select Table
REFEN PDCLK Power Down Selection Mode
Pin 4 Pin 11
0
0 The entire chip is off.
0
1 PLL and CLK output run, REFOUT low.
1
0 REFOUT running, PLL off, CLK low.
1
1 All running.
Key: 0 = connect directly to GND
1 = connect directly to VDD
Number
1
2, 3
4
5, 6
7
8
9
10, 15
11
12
13
14
16
Name
X1/ICLK
VDD
REFEN
GND
S3
S2
CLK
DC
PDCLK
S1
S0
REFOUT
X2
Type
XI
P
I
P
I
I
O
-
I
I
I
O
XO
Description
Crystal connection. Connect to a 3.6864 MHz crystal, or input clock.
Connect to +3.3V or +5V. All VDDs must be same.
Reference Clock Enable. See above table.
Connect to ground.
Frequency select pin 3. Determines clock outputs per table above.
Frequency select pin 2. Determines clock outputs per table above.
Audio clock output set by status of S0-S3. See table above.
Don't Connect. Do not connect anything to these pins.
Power Down Clock. See above table.
Frequency select pin 1. Determines clock outputs per table above.
Frequency select pin 0. Determines clock outputs per table above.
Buffered 3.6864 MHz oscillator output clock. Controlled by REFEN.
Crystal connection. Connect to a 3.6864 MHz crystal, or leave unconnected for clock.
Key: I = Input; O = output; P = power supply connection; XI, XO = crystal connections
The input pins S3:S0 lack pull-ups, so they cannot be left floating. Tie directly to VDD or GND. For a
clock input, connect the input to X1, and leave X2 unconnected (floating).
MDS 548-05 AC
2
Revision 032900
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
Share Link: 