BR25G128FVM-3GTR Просмотр технического описания (PDF) - ROHM Semiconductor

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BR25G128FVM-3GTR

Serial EEPROM Series Standard EEPROM SPI BUS EEPROM

ROHM Semiconductor 

BR25G128-3

Block Diagram

CSB 1

SO 2

WPB 3

GND 4

Datasheet

INSTRUCTION DECODE

CONTROL CLOCK

GENERATION

VOLTAGE

DETECTION

WRITE

INHIBITION

HIGH VOLTAGE

GENERATOR

INSTRUCTION

REGISTER

ADDRESS

REGISTER

DATA

REGISTER

STATUS REGISTER

ADDRESS

14bit

14bit

DECODER

READ/WRITE

8bit

8bit

AMP

128K

EEPROM

8 Vcc

7 HOLDB

6 SCK

5 SI

Pin Configuration

Figure 3. Block Diagram

(TOP VIEW)

Vcc HOLDB SCK SI

Pin Descriptions

Terminal

name

Vcc

GND

CSB

SCK

SI

SO

Input

/Output

-

-

Input

Input

Input

Output

HOLDB Input

WPB

Input

CSB SO WPB GND

Figure 4. Pin Configuration

Function

Power source to be connected

All input / output reference voltage, 0V

Chip select input

Serial clock input

Ope code, address, and serial data input

Serial data output

Hold input

Command communications may be suspended

temporarily (HOLD status)

Write protect input

Write status register command is prohibited

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TSZ02201-0R2R0G100670-1-2

19.Mar.2014 Rev.001

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