Nexperia
74ALVCH16952
16-bit registered transceiver; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7
1OEAB, 1OEBA, 2OEAB, 2OEBA
1CEAB, 1CEBA, 2CEAB, 2CEBA
1CPAB, 1CPBA, 2CPAB, 2CPBA
Pin
5, 6, 8, 9, 10, 12, 13, 14
52, 51, 49, 48, 47, 45, 44, 43
15, 16, 17, 19, 20, 21, 23, 24
42, 41, 40, 38, 37, 36, 34, 33
1, 56, 28, 29
3, 54, 26, 31
2, 55, 27, 30
GND
VCC
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
Description
data inputs or outputs
data inputs or outputs
data inputs or outputs
data inputs or outputs
output enable input (active LOW)
clock enable input (active LOW)
clock pulse input
(LOW-to-HIGH, edge-triggered)
ground (0 V)
supply voltage
6 Functional description
Table 3. Function table [1]
Operating mode
A to B,
B to A
Hold
Load and output enable
Control
nOEAB,
nOEBA
L
L
Load and output disable
H
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH clock transition;
X = don’t care;
Z = high impedance OFF-state;
NC = no change.
nCEAB,
nCEBA
H
L
L
nCPAB,
nCPBA
X
↑
↑
Input
nAn,
nBn
X
L
H
L
H
Internal
nQn
NC
L
H
L
H
Output
nBn,
nAn
NC
L
H
Z
Z
74ALVCH16952
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 9 January 2018
© Nexperia B.V. 2018. All rights reserved.
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