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W83195BR-25

200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET

Winbond 

W83195BR-25

4.3 I2C Control Interface

SYMBOL

PIN

*SDATA

24

*SDCLK

23

PRELIMINARY

I/O

FUNCTION

I/O Serial data of I2C 2-wire control interface with internal

pull-up resistor.

IN Serial clock of I2C 2-wire control interface with

internal pull-up resistor.

4.4 Fixed Frequency Outputs

SYMBOL

PIN

REF0 / FS4&

56

24_48MHz/FS2&

35

48MHz/ FS3*

34

I/O

FUNCTION

I/O 14.318MHz reference clock. This REF output is the

stronger buffer for ISA bus loads.

Latched input for FS4 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks (Default=0).

I/O 24MHz or 48MHz output clock. Default is 24MHz.

Latched input for FS2 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks(Default=0).

I/O 48MHz / Latched input for FS3 at initial power up

for H/W selecting the output frequency of CPU,

SDRAM and PCI clocks (Default=1).

4.5 Power Pins

SYMBOL

VddC,VddA

Vdd48

Vdd3

VddP

VddR

VddS

Vss

PIN

FUNCTION

53,55

Power supply for CPU & IOAPIC, 2.5V or 3.3V.

33

Power supply for 48MHz output,3.3V.

9

Power supply for 3V_66 output, 3.3V.

10,18

Power supply for PCICLK, 3.3V.

1

Power supply for REF0, 3.3V.

45,37,32,25

Power supply for SDRAM_F,SDRAM[0:11], nominal

3.3V.

4,5,14,21,28,29,36, Circuit Ground.

41, 49.50

Publication Release Date: May 2000

-4-

Revision 0.52

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