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HMC981LP3E

ACTIVE BIAS CONTROLLER

Analog Devices 

v01.0411

HMC981LP3E

ACTIVE BIAS CONTROLLER

There will be a voltage drop from VDD to VDRAIN due to finite RDS_ON resistance of the internal switch. To

compensate for this voltage drop choose the VDD value as shown in equation (1).

VDD = VDRAIN + IDRAIN x RDS_ON

(1)

where VDRAIN is the supply voltage of the external amplifier and IDRAIN is the desired constant bias current through

the external amplifier.

Note that RDS_ON resistance of the internal FET switch can be adjusted through SW pin. RDS_ON is typically equal

to 5 Ohms when SW is pulled up to VDIG, and is typically equal to 10 Ohms when SW is pulled down to GND. If SW

is left floating, it is pulled up to VDIG through an internal weak pull-up. Recommended settings for the SW position

are given in Table-1. Not using the HMC981LP3E in the recommended settings will increase the power dissipation of

the part and may increase the part-to-part variation.

Table 1. Recommended Current Range Configuration

Current Range (mA)

Condition

20 to 80

SW=GND

80 to 200

SW=VDIG

RDS_ON (Ohm)

10

5

Negative Voltage Generator (VNEGOUT)

The HMC981LP3E has an internally regulated charge pump block to generate negative voltage (VNEGOUT) required

for depletion mode devices. The HMC981LP3E generates -2.5V at the VNEGOUT output in default configuration. It

requires two diodes and two capacitors connected externally as shown in the sample application schematics. The

HMC981LP3E is designed to reject the ripple on the VNEGOUT by isolating VNEGOUT from the VGATE. The nega-

tive voltage is only required for depletion mode devices, and it can be disabled through the VGATEFB and VNEGFB

pins. Where an enhancement device is targeted or a negative supply is already available in the system, simply con-

nect the available negative supply to the VNEG pin. See Table-2 for detail on how to set this operation mode.

13

Enable/Disable (EN)

The active bias control loop is enabled when EN is pulled up to VDIG, and it is disabled when it is pulled down to

GND. If EN is left floating HMC981LP3E is enabled through an internal weak pull-up. Note that VNEG operation is

independent of EN condition. EN signal controls the operation of only VGATE, VG2 and VDRAIN outputs. When EN

pulled down to GND, the HMC981LP3E discharges VDRAIN and VG2 down to GND and it pulls the VGATE down to

VNEG. Please see the “Active Bias Control Loop” section for detailed explanation.

Active Bias Control Loop

The HMC981LP3E regulates the bias current (IDRAIN) of the amplifier under bias through VGATE output connected

to the gate of the external amplifier. In this closed loop operation the current passing through the amplifier under bias

is sampled and is used to adjust VGATE to achieve constant quiescent bias through the external amplifier.

The HMC981LP3E continuously compensates for any supply, temperature, process variations and threshold drifts

due to aging. The part-to-part, temperature, and supply variation of the HMC981LP3E is excellent. Thus, by using an

accurate sense resistor connected to the ISENSE pin, expensive calibration procedures in high volume production

could be avoided.

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