LP62S16128B-I Просмотр технического описания (PDF) - AMIC Technology

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LP62S16128B-I

128K X 16 BIT LOW VOLTAGE CMOS SRAM

AMIC Technology 

Package Information

48LD CSP (6 x 8 mm) Outline Dimensions

(48TFBGA)

TOP VIEW

Ball*A1 CORNER

123456

A

B

C

D

E

F

G

H

SIDE VIEW

LP62S16128B-I Series

unit: mm

BOTTOM VIEW

Ball#A1 CORNER

0.10 S C

0.25 S C A B

b (48X)

654321

A

B

C

D

E

F

G

H

B

e

D1

A

D

0.20(4X)

C SEATING PLANE

Symbol

A

A1

A2

D

E

D1

E1

e

b

Dimensions in mm

MIN. NOM. MAX.

1.04 1.14 1.24

0.20 0.25 0.30

0.48 0.53 0.58

5.90 6.00 6.10

7.90 8.00 8.10

--- 3.75 ---

--- 5.25 ---

--- 0.75 ---

0.30 0.35 0.40

Note:

1. THE BALL DIAMETER, BALL PITCH, STAND-OFF & PACKAGE THICKNESS

ARE DIFFERENT FROM JEDEC SPEC MO192 (LOW PROFILE BGA FAMILY).

2. PRIMARY DATUM C AND SEATING PLANE ARE DEFINED BY THE SPHERICAL

CROWNS OF THE SOLDER BALLS.

3. DIMENSION b IS MEASURED AT THE MAXIMUM.

THERE SHALL BE A MINIMUM CLEARANCE OF 0.25mm BETWEEN THE EDGE OF

THE SOLDER BALL AND THE BODY EDGE.

4. BALL PAD OPENING OF SUBSTRATE IS Φ 0.3mm (SMD)

SUGGEST TO DESIGN THE PCB LAND SIZE AS Φ 0.3mm (NSMD)

(August, 2001, Version 1.0)

14

AMIC Technology, Inc.

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