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W83194BR-KX

STEP-LESS 3-DIMM K7 CLOCK

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W83194BR-KX

STEP-LESS 3-DIMM K7 CLOCK

1.0 GENERAL DESCRIPTION

The W83194BR-KX is a Clock Synthesizer which provides all clocks required for AMD K7.

W83194BR-KX provides 64 CPU/PCI frequencies which are selectable with smooth transitions by

hardware or software. W83194BR-KX also provides 13 SDRAM clocks controlled by the none-delay

buffer_in pin.

The W83194BR-KX provides step-less frequency programming by controlling the VCO freq. and the

programmable PCI clock output divisor ratio. A watchdog timer is quipped and when time out, the

RESET# pin will output 4ms pulse signal.

The W83194BR-KX accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at

±0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency

selection through I2C interface. The device meets the Pentium power-up stabilization, which requires

CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots (ISA,

PCI, CPU, DIMM) is not recommend.

2.0 PRODUCT FEATURES

• Supports AMD CPU with I2C.

• 3 CPU clocks (one free-running chipset clock controlled by I2C)

• 13 SDRAM clocks for 3 DIMMs

• 6 PCI synchronous clocks

• One IOAPIC clock for multiprocessor support

• Optional single or mixed supply:

(Vddq1=Vddq2 = Vddq3 = Vddq4 = VddL1 =VddL2= 3.3V) or (Vddq1= Vddq2 = Vddq3=Vddq4 =

3.3V, VddL1 = VdqL2 = 2.5V)

• < 250ps skew among CPU and SDRAM clocks

• < 250ps skew among PCI clocks

• < 5ns propagation delay SDRAM from buffer input

• Skew from CPU (earlier) to PCI clock 1 to 4ns, center 2.6ns.

• Smooth frequency switch with selections from 66 MHz to 200 MHz CPU

• Stepless frequency programming by controlling the VCO freq. and the clock output divisor ratio

• Programmable skew and driving strength for CPU and SDRAM clock outputs

• I2C 2-Wire serial interface and I2C read back

• ±0.25% or ±0.5% spread spectrum function to reduce EMI

• Programmable registers to enable/stop each output and select modes

• MODE pin for power Management and RESET# out when system hang

• One 48 MHz for USB & one 24 MHz for super I/O

• 48-pin SSOP package

Publication Release Date: May 2000

-1-

Revision 0.42

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