CDB4353(2009) Просмотр технического описания (PDF) - Cirrus Logic

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CDB4353
(Rev.:2009)

3.3 V Stereo Audio DAC with 2 VRMS Line Output

Cirrus Logic 

CS4353

TABLE OF CONTENTS

1. PIN DESCRIPTIONS ............................................................................................................................. 4

2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6

RECOMMENDED OPERATING CONDITIONS .................................................................................... 6

ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 6

DAC ANALOG CHARACTERISTICS .................................................................................................... 7

COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ........................................ 8

SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE .......................................................... 9

DIGITAL INTERFACE CHARACTERISTICS ....................................................................................... 10

INTERNAL POWER-ON RESET THRESHOLD VOLTAGES ............................................................. 10

DC ELECTRICAL CHARACTERISTICS .............................................................................................. 11

3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 12

4. APPLICATIONS ................................................................................................................................... 13

4.1.1 Ground-centered Outputs ...................................................................................................... 13

4.1.2 Full-scale Output Amplitude Control ...................................................................................... 13

4.1.3 Pseudo-differential Outputs ................................................................................................... 13

4.9.1 Power-up Sequences ............................................................................................................ 19

4.9.1.1 External RESET Power-up Sequence ....................................................................... 19

4.9.1.2 Internal Power-on Reset Power-up Sequence .......................................................... 19

4.9.2 Power-down Sequences ....................................................................................................... 19

4.9.2.1 External RESET Power-down Sequence .................................................................. 19

4.9.2.2 Internal Power-on Reset Power-down Sequence ...................................................... 19

4.10.1 Capacitor Placement ........................................................................................................... 20

5. DIGITAL FILTER RESPONSE PLOTS ................................................................................................ 21

6. PARAMETER DEFINITIONS ................................................................................................................ 23

7. PACKAGE DIMENSIONS .................................................................................................................... 24

8. ORDERING INFORMATION ................................................................................................................ 25

9. REVISION HISTORY ............................................................................................................................ 25

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DS803F1

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