CDB4353(2009) Просмотр технического описания (PDF) - Cirrus Logic

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CDB4353
(Rev.:2009)

3.3 V Stereo Audio DAC with 2 VRMS Line Output

Cirrus Logic 

CS4353

DC ELECTRICAL CHARACTERISTICS

Test conditions (unless otherwise specified): VCP = VA = VL = 3.3 V; AGND = DGND = CPGND = 0 V; SDIN = 0;

all voltages with respect to ground.

Parameters

Symbol Min

Typ

Max Units

Power Supplies

Power Supply Current (Note 15)

Normal Operation

Power-Down, All Supplies (Note 16)

IVCP

IVA

IVL

IPD

Power Dissipation (All Supplies) Normal Operation, 1_2VRMS = 0

(Note 15)

Power-Down (Note 16)

-

36

43

mA

-

2.4

3

mA

-

0.1

0.2

mA

-

65

-

μA

-

127

152

mW

-

1

-

mW

Power Supply Rejection Ratio (Note 17)

(1 kHz) PSRR

-

60

-

dB

(60 Hz)

-

60

-

dB

DC Output Voltages

Pin Voltage

FLYP+ to FLYP-

VFILT+ to GND (Note 18)

FLYN+ to FLYN-

GND to VFILT- (Note 18)

VA to VBIAS

-

3.3

-

V

-

6.6

-

V

-

6.6

-

V

-

6.6

-

V

-

2.1

-

V

Notes: 15. Current consumption increases with increasing sample rate and increasing MCLK frequency. Typical

values are based on Fs = 48 kHz and MCLK = 12.288 MHz. Maximum values are based on highest

sample rate and highest MCLK frequency; see Switching Specifications - Serial Audio Interface. Vari-

ance between speed modes is small.

16. Power-down is defined as RESET pin = Low with all clock and data lines held static low. All digital inputs

have a weak pull-down (approximately 50 kΩ) which is only present during reset. Opposing this pull-

down will slightly increase the power-down current.

17. Valid with the recommended capacitor value on VBIAS as shown in the typical connection diagram in

Section 3.

18. Typical voltage shown for “Initialization State”, see Section 4.8. Typical voltage may be up to 1.5 V lower

during normal operation.

2.1 Digital I/O Pin Characteristics

Input and output levels and associated power supply voltage are shown in Table 1. Logic levels should not

exceed the corresponding power supply voltage.

Pin Name

RESET

MCLK

LRCK

SCLK

SDIN

DEM

I²S/LJ

1_2VRMS

Power Supply

VL

I/O

Input

Input

Input

Input

Input

Input

Input

Input

Driver

-

-

-

-

-

-

-

-

Receiver

0.9 V - 3.3 V, with Hysteresis

0.9 V - 3.3 V

0.9 V - 3.3 V

0.9 V - 3.3 V

0.9 V - 3.3 V

0.9 V - 3.3 V

0.9 V - 3.3 V

0.9 V - 3.3 V

Table 1. Digital I/O Pin Characteristics

DS803F1

11

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