PHP212L Просмотр технического описания (PDF) - Philips Electronics

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PHP212L

Dual P-channel enhancement mode MOS transistor

Philips Electronics 

Philips Semiconductors

Dual P-channel enhancement

mode MOS transistor

Objective specification

PHP212L

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL

PARAMETER

CONDITIONS

MIN. MAX. UNIT

Per P-channel

VDS

drain-source voltage (DC)

VGS

gate-source voltage (DC)

ID

drain current (DC)

IDM

peak drain current

Ptot

total power dissipation

Tstg

storage temperature

Tj

operating junction temperature

Source-drain diode

IS

source current (DC)

ISM

peak pulsed source current

Ts = 80 °C; note 1

note 2

Ts = 80 °C; note 3

Tamb = 25 °C; note 4

Tamb = 25 °C; note 5

Tamb = 25 °C; note 6

Ts = 80 °C

note 2

−

−30

V

−

±12

V

−

−4

A

−

−16

A

−

3.5

W

−

2.6

W

−

1.1

W

−

1.5

W

−55

+150 °C

−55

+150 °C

−

−2.6

A

−

−10

A

Notes

1. Ts is the temperature at the soldering point of the drain lead.

2. Pulse width and duty cycle limited by maximum junction temperature.

3. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 3.5 W at the same time.

4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp

(ambient to tie-point) of 27.5 K/W.

5. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp

(ambient to tie-point) of 90 K/W.

6. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with

an Rth a-tp (ambient to tie-point) of 90 K/W.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

Rth j-s

thermal resistance from junction to soldering point

VALUE

20

UNIT

K/W

1997 Jun 20

3

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