PI6C2305-1HW Просмотр технического описания (PDF) - Pericom Semiconductor Corporation
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PI6C2305-1HW Datasheet PDF : 6 Pages
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PI6C2305-1
3.3V Zero-Delay Buffer 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Switching Characteristics(4, 5) (Over operating conditions)
Parameters
Name
Test Conditions
Min.
FCLK
Output Frequency
30pF load
10
Duty Cycle(4) = t2 ÷ t1
Measured at VDD/2,
FOUT < 66.66 MHz
45
Duty Cycle(4) = t2 ÷ t1
Measured at 1.4V,
FOUT ≤ 45 MHz
40
t3
Rise Time(4) @30pF
t3
Rise Time(4)@30pF (H)
t4
Fall Time(4) @30pF
Measured between
0.8V and 2.0V
t4
Fall Time(4)@30pF (H)
t5
Output to Output Skew(4)
All outputs equally loaded
t6
Delay, REF Rising Edge to
CLK0 Rising Edge(4)
Measured at VDD/2
t7
Device to Device Skew(4)
Measured at VDD/2 on the
output pins of devices
t8
Output Slew Rate(4)
Measured between 0.8V and 2.0V
on -H device using Test Circuit #2
1
tJ
Cycle to Cycle Jitter(4)
Measured at 66.67 MHz,
loaded outputs
tLOCK
PLL Lock Time(4)
Stable power supply, valid clocks
presented on REFpins
Typ. Max. Units
100 MHz
50 55
%
50 60
2.5
1.5
ns
2.5
1.5
250
0 ±350 ps
0 700
V/ns
200 ps
1.0 ms
Notes:
4. Parameter is guaranteed by design and characterization. Not 100% tested in production.
5. For definition of t1-8, see Switching Waveforms on page 5.
4
PS9477A
06/06/00
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