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CXD3511Q

Digital Signal Driver/Timing Generator

Sony Semiconductor 

CXD3511Q

Pin

No.

Symbol

148 CTRL

149 PCG

150 VSS

151 PST

152 PO3

153 PO2

154 PO1

155 HD2

156 VDD1

157 FRP

158 XFRP

159 SHST

160 DENB

161 PRG

162 VDD1

163 VSS

164 PO4

165 CLP

166 PO5

167 HD1

168 TEST1

169 TEST2

170 TEST3

171 TEST4

172 TEST5

173 TEST6

174 VDD2

175 VSS

176 R1IN7

177 R1IN6

178 R1IN5

179 R1IN4

180 R1IN3

181 R1IN2

182 R1IN1

183 R1IN0

184 R2IN7

I/O

Description

I

Scan direction control method switching

(Low: internal register, High: external)

Input pin

processing for

open status

L

O Collective precharge timing pulse output

—

— GND

—

O Dot sequential precharge start timing pulse output

—

O Parallel output 3

—

O Parallel output 2

—

O Parallel output 1

—

O Horizontal auxiliary pulse output 2

—

— Internal operation power supply

—

O AC drive inversion timing pulse output

—

O AC drive inversion timing pulse output (reversed polarity of FRP)

—

O SHST pulse output

—

O DENB pulse output

—

O 2-step precharge timing pulse output

—

— Internal operation power supply

—

— GND

—

O Parallel output 4

—

O CLP pulse output

—

O Parallel output 5

—

O Horizontal auxiliary pulse output 1

—

— Test pin (Connect to GND.)

—

— Test pin (Connect to GND.)

—

— Test pin (Connect to VDD2.)

—

— Test pin (Connect to VDD2.)

—

— Test pin (Connect to VDD2.)

—

— Test pin (Connect to VDD2.)

—

— I/O power supply

—

— GND

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 1)

—

I Red data input (port 2)

—

–8–

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