CXD3511Q Просмотр технического описания (PDF) - Sony Semiconductor
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CXD3511Q Datasheet PDF : 79 Pages
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CXD3511Q
Electrical Characteristics
DC Characteristics
(Topr = –20 to +75°C, VSS = 0V)
Item
Symbol
Applicable pins
Conditions
Min.
Typ.
Max. Unit
Supply
VDD1
—
voltage
VDD2
—
2.3
2.5
2.7
—
3.0
3.3
3.6
Input
voltage 1
VIH1
∗1
VIL1
2.0
CMOS input cell
–0.3
— VDD2 + 0.3
—
0.8
Input
voltage 2
Input
voltage 3
VIH2
VIL2
VC∗2
VIH3
VIL3
HDIN, VDIN, PCTL,
CMOS Schmitt
PCLK, PDAT0 to PDAT9 trigger input cell
CLKP, CLKN
Small-amplitude
differential input
0.8VDD2
— VDD2 + 0.3
–0.3
—
0.2VDD2 V
1.718
2.0
2.281
1.868 VC + 0.4 VDD2
VSS VC – 0.4 2.131
Output
voltage
VOH
All output pins
VOL
—
VDD2 – 0.5 —
VDD2
—
VSS
—
0.2
Current
consumption
PD∗3
—
CLKP = 200MHz
—
2600
3120 mW
∗1 Input pins other than those indicated in items Input voltage 2 and Input voltage 3.
∗2 VIH3 > VC (max.) and VIL3 < VC (min.).
∗3 Tj [°C] ≥ Toprmax [°C] + θja [°C/W] × PD [W].
(Tj = 125 [°C], Toprmax = 75 [°C], θja = 16 [°C/W], when mounted on a 4-layer substrate)
AC Characteristics
(Topr = –20 to +75°C, VDD1 = 2.5 ± 0.2V, VDD2 = 3.3 ± 0.3V, VSS = 0V)
Item
Clock input period
Symbol
—
Applicable pins
CLKP, CLKN, CLKC
Conditions
—
Min. Typ. Max. Unit
5
—
—
Input setup time
tis
Input hold time
tih
RGB input, OSD input,
—
HDIN, VDIN
—
2.5
—
1.5
—
Output rise/fall
delay time
tor/tof
∗4
CL = 20pF
2
5
Output rise/fall
delay time
tor/tof
RGB output
CL = 20pF
2
4
Output rise/fall
delay time
tor/tof
CLKOUT
CL = 50pF 1.5 4.5
Cross-point time
difference
HCK1 duty
HCK2 duty
∆t
HCK1, HCK2, DCK1,
DCK1X, DCK2, DCK2X
CL = 20pF
–5
—
th/(th + tl) HCK1
CL = 20pF 48
50
tl/(th + tl) HCK2
CL = 20pF 48
50
Phase compensation
PLL operating
—
frequency
PLLDIV = L 55
—
—
PLLDIV = H 27.5 —
∗4 Output pins other than RGB output, CLKOUT, PO1 to PO5, RGT, XRGT and DWN.
—
—
10
ns
8
8.5
5
52
%
52
100
MHz
55
– 11 –
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