CDB5503 Просмотр технического описания (PDF) - Cirrus Logic
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CDB5503 Datasheet PDF : 54 Pages
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CS5501 CS5503
CS5501/CS5503
RECOMMENDED OPERATING CONDITIONS (AGND, DGND = 0V) (Note 12)
Parameter
Symbol Min
Typ
Max
DC Power Supplies:
Positive Digital
Negative Digital
Positive Analog
Negative Analog
Analog Reference Voltage
Analog Input Voltage:
Unipolar
Bipolar
VD+
4.5
5.0
VA+
VD-
-4.5
-5.0
-5.5
VA+
4.5
5.0
5.5
VA-
-4.5
-5.0
-5.5
VREF
1.0
2.5
3.0
(Note 13)
VAIN AGND
-
VREF
VAIN -VREF
-
VREF
Units
V
V
V
V
V
V
V
Notes: 12. All voltages with respect to ground.
13. The CS5501 and CS5503 can accept input voltages up to the analog supplies (VA+ and VA-). They
will accurately convert and filter signals with noise excursions up to 100mV beyond |VREF|.
After filtering, the devices will output all 1’s for any input above VREF and all 0’s for any input below
AGND in unipolar mode and -VREF in bipolar mode.
SWITCHING CHARACTERISTICS (TA = Tmin to Tmax; CLKIN=4.096 MHz; VA+, VD+ = 5V±10%;
VA-, VD- = -5V ± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; CL = 50 pF; unless otherwise specified.)
Parameter
Symbol Min
Typ
Max Units
Master Clock Frequency: Internal Gate Oscillator
CLKIN 200
(See Table 1)
Externally Supplied: (Note 14)
Maximum
CLKIN
-
Minimum
(Note 15) CLKIN 200
CLKIN Duty Cycle
20
Rise Times:
Any Digital Input
trise
-
Any Digital Output
(Note 16) trise
-
Fall Times:
Any Digital Input
tfall
-
Any Digital Output
(Note 16) tfall
-
Set Up Times:
SC1, SC2 to CAL Low
tscs
100
SLEEP High to CLKIN High (Note 17) tsls
1
Hold Time:
SC1, SC2 hold after CAL falls
tsch
100
4096
5000 kHz
-
5000 kHz
40
-
kHz
-
80
%
-
1.0
µs
20
-
ns
-
1.0
µs
20
-
ns
-
-
ns
-
-
µs
-
-
ns
Notes: 14. CLKIN must be supplied whenever the CS5501 or CS5503 is not in SLEEP mode. If no clock is
present when not in SLEEP mode, the device can draw higher current than specified
and possibly become uncalibrated.
15. The CS5501/CS5503 is production tested at 4.096 MHz. It is guaranteed by characterization
to operate at 200 kHz.
16. Specified using 10% and 90% points on waveform of interest.
17. In order to synchronize several CS5501’s or CS5503’s together using the SLEEP pin,
this specification must be met.
DS31F54
7
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