CY7C1041CV33 Просмотр технического описания (PDF) - Cypress Semiconductor
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CY7C1041CV33 Datasheet PDF : 12 Pages
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Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled)[14, 15]
tWC
ADDRESS
CE
tSA
WE
BHE, BLE
DATA I/O
Write Cycle No. 2 (BLE or BHE Controlled)
ADDRESS
tAW
tWC
tSCE
tPWE
tBW
tSD
BHE, BLE
tSA
tBW
WE
CE
DATA I/O
tAW
tPWE
tSCE
tSD
Notes:
14. Data I/O is high-impedance if OE or BHE and/or BLE = VIH.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
CY7C1041CV33
tHA
tHD
tHA
tHD
Document #: 38-05134 Rev. *H
Page 7 of 12
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